This class uses training materials developed by ARM®
ARM Architecture Fundamentals. Recommended for audiences developing low level code on ARM for the first time. This optional day introduces the ARMv7-A ISA, exception model and memory model.
ARM Processor Cores
ARM System Design
Writting Software for ARM Processors
Note: For delegates who already have a good understanding of the ARM processors’ architecture and general programmer’s model, it may be appropriate to start on Day 2. Please discuss this option with your local team prior to booking.
Cortex-A15 MPCore Overview
ARMv7-A Assembly Intruction Set
Configuring Caches and Branch Prediction
Using the MMU
Introduction to TrustZone
Programming the Interrupt Controller (GIC)
Cortex-A Power Management
Maintaining Cache Coherency
Booting a Cortex-A15 MPCore
Writing C for ARM
Virtualization in Cortex A-15
Performance Monitoring Unit and Trace Functionalities
NEON Co-Processor Overview
The Cortex-A15 MPCore has been purposely designed to work in tandem with the a Cortex-A7 MPcore cluster whilst relying on automated data cache coherency management. For Cortex-A15 MPCore software classes run on-site, we offer the possibility to include the Cortex-A7 specific sections to provide a rounded view of a big.LITTLE system on chip configuration.
The learning is reinforced with practical exercises using the ARM DS-5 software development platform and covers assembly programming and bringing a complete bare metal system to life.
Lab exercises for assembly programming cover the concepts of data transfer, data processing, flow control and DSP instructions.
Additional exercises show the main steps involved in bringing a bare metal system to life, including the configuration of the various mode stacks and the creation of an exception handler. These exercises make use of the assembler and linker as well as the interactive debugger.
- 10 Days
- 0 Units
- 0 Hrs