Course materials
Course materials are renowned for being the most comprehensive and user friendly available. Course Fees include:
Fully indexed course notes creating a complete reference manual
Workbook full of practical examples and solutions to help you apply your knowledge

Structure and Content
Designing with programmable logic and ASICs • Synchronous design techniques • Using HDLs

Digital Design Fundamentals
Representing bits and three-states • Unsigned and signed (two’s complement) numbers • Static and dynamic definition of combinational logic • Logic minimisation • Avoiding asynchronous sequential logic

Synchronous Sequential Logic
Principles • Using D-type flip-flops • Characterisation – timing constraints • Timing violations and metastability issues • Timing performance of synchronous systems • Static timing analysis • Other flip-flop types

An Overview of HDL-Based Design
First and second generation HDLs • VHDL and Verilog • Design process using HDLs

Introduction to Programmable Logic
Survey of programmable logic devices •: Selecting an appropriate device • Importance of the internal structure • I/O pin standards • Pull-ups; open collector; tristates and bi-directional tristate bubble-up • Pin assignment • JTAG boundary scan

Common Functions and their Implementation
Encoders and decoders • Priority encoders • Multiplexers • Tristates used as Muxes • Parity generator • Shift Registers • Johnson (ring) “counters” • Linear Feedback Shift Registers

Arithmetic Structures
Half and full adders • Large adders •: Carry lookahead adder • Pipelining • Synthesis of adders • Counters • Wide counters • Binary to BCD conversion • Serial arithmetic • Importance of synchronous design

Synchronous Finite State Machines and Memories
Definition • Graphical entry and symbolism • Moore and Mealy structures • Implementation • State encoding and optimisation • Using HDLs to design FSMs • Using memories • Memory types

Introduction to ASICs
ASIC types and technologies • ASIC economics • Design for test • Design process for ASICs.

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