LearnChase training materials are renowned as the most comprehensive and user friendly available. Their style, content and coverage is unique in the HDL training world, and has made them sought after resources in their own right. Class fees include:
Fully indexed class notes creating a complete reference manual
Workbook full of practical examples to help you apply your knowledge This includes a tool tour guide (to support the Verilog-AMS simulation tool used in the practical sessions).
Structure and Content
Review of Verilog 1364-2005 • Verilog basics • Analogue modelling in Verilog • Other analogue HDLs
Definition of a discipline • Natures and tolerances • Nets, branches and references • Contribution statements • Net attributes • parameters • Examples: resistor, capacitor
Analog if and case statements • macromodels • signal flow ports • wreal • Frequency domain models • Filter functions • Examples: diode, op amp, transmission line
Analysis types • Initial conditions • Discontinuity • Time step control • Analogue events • Time dependencies • Limiting functions • Mixed-signal simulation cycle • Examples: Comparator, ADC, DAC
‘analog’ functions • NMOS model • Optimising code • Noise modelling • Partial derivatives • Table modelling • Mixed disciplines • Paramset • Connect modules • Conclusions.
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